Tools

This course will use the Mentor tool suite.

• Getting started with Mentor
  • Documentation on Mentor in the CS environment
  • Using Mentor remotely
• Verilog cheat sheet - everything you need is in this document!
• WISC-SP13 Simulator-debugger
• Using the assembler
• Other references
  • Command-line Verilog Simulation Tutorial : Recommended approach for this course. We will use ModelSim.
  • Verilog Tutorial Slides, 4 on a page.
  • Verilog rules : You shall not deviate from rules in this document
  • Vcheck.class, VerFile.class
  • Verilog Rules Check
  • Tools FAQ
  • Miscellaneous hardware design documentation. Information is for reference, some things may not work in our current environment.
    • Mentor tool overview from Santa Clara University
• Sharing files between project members
• Deprecated documents
  • Verilog Simulation with GUI
  • Verilog Simulation Using Command-line
  • Old tutorial