Homework modules provided

1.  HW1 basic modules

• nand2.v
• nand3.v
• nor2.v
• nor3.v
• not1.v
• xor2.v
• xor3.v
• dff.v
• clkrst.v
• test bench examples used in class

2.  HW2 modules

• hw2.tar

3.  HW3 modules

• rf.v
• rf_hier.v
• sc.v
• sc_hier.v
• seq_detect_hier.v
• fifo.v
• fifo_hier.v

4.  HW4 modules

• rf_bypass.v
• rf_bypass_hier.v

5.  clkrst module

clkrst.v

6.  Development Testbenches

6.1  HW3 testbench

• Register file testbench
  • Usage instructions.
  • rf_bench.v
• sc dummy testbench
  • sc_bench.v

• seq_detect dummy testbench
  • seq_detect_bench.v

• fifo dummy testbench
  • fifo_bench.v

6.2  HW4 testbench

• *This is an old testbench, not guaranteed to work correctly. Use with discretion.*
• Register file with bypass testbench
  • Usage instructions.
  • rf_bypass_hier_bench.v

6.3  HW5 testbench

• Memory system verilog testbench for HW5: tar ball. (Latest)
• Cache simulator