RISC-V Instruction Set Architecture

RISC-V Instruction Set Architecture Specification

1.  Instructions Summary

For this project you will be implementing a portion of the RISC-V 32I subset. We have provided a list of instructions, their semantics, a short assembly language guide, and an FAQ. You are encouraged to look through the RISC-V Instruction Set Manual (Chapter 2) to get more detailed information about the various instructions you will be expected to support in your processor. Document pointers.

1. ISA Specification, semantics, assembly language guide
2. RISC-V Instruction Set Manual (Chapter 2)